use core::ops::Deref;
use cortex_m::{asm, interrupt, peripheral::nvic};

pub struct NVIC;

impl Deref for NVIC {
    type Target = nvic::RegisterBlock;
    fn deref(&self) -> &Self::Target {
        unsafe { &*cortex_m::peripheral::NVIC::PTR }
    }
}

pub fn run_progress(addr: u32) {
    
    interrupt::free(|_| {
        for reg in NVIC.icer.iter() {
            unsafe { reg.write(0xFFFFFFFF); }
        }
        for reg in NVIC.icpr.iter() {
            unsafe { reg.write(0xFFFFFFFF); }
        }
    });

    unsafe {
        asm::bootload(addr as *const u32)
    }
}




